(China (Mainland))
Product Summary
The M12L64164A-5T is a 1M x 16 Bit x 4 Banks Synchronous DRAM organized as 4 x 1,048,576 words by 16 bits. Synchronous design allows precise cycle controls with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
Parametrics
M12L64164A-5T absolute maximum ratings: (1)Voltage on any pin relative to VSS:-1.0 ~ 4.6V ; (2)Voltage on VDD supply relative to VSS:-1.0 ~ 4.6V ; (3)Storage temperature:-55 ~ +150℃; (4)Power dissipation:1 W; (5)Short circuit current:50 mA.
Features
M12L64164A-5T features: (1)JEDEC standard 3.3V power supply; (2)LVTTL compatible with multiplexed address ; (3)Four banks operation; (4)MRS cycle with address key programs: CAS Latency (2 & 3), Burst Length (1, 2, 4, 8 & full page), Burst Type (Sequential & Interleave); (5)All inputs are sampled at the positive going edge of the system clock; (6)DQM for masking; (7)Auto & self refresh; (8)15.6μs refresh interval.
Diagrams
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 M12L64164A-5TG |
Other |
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Data Sheet |
Negotiable |
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M12L64164A-5TIG |
Other |
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Data Sheet |
Negotiable |
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